• Part: HI-3200
  • Description: AVIONICS DATA MANAGEMENT ENGINE
  • Manufacturer: HOLTIC
  • Size: 221.00 KB
Download HI-3200 Datasheet PDF
HOLTIC
HI-3200
HI-3200 is AVIONICS DATA MANAGEMENT ENGINE manufactured by HOLTIC.
October 2016 HI-3200, HI-3201 AVIONICS DATA MANAGEMENT ENGINE / ARINC 429 - CAN BUS BRIDGE GENERAL DESCRIPTION The HI-3200 from Holt Integrated Circuits is a single chip CMOS data management IC capable of managing, storing and forwarding avionics data messages between eight ARINC 429 receive channels, four ARINC 429 transmit channels and a single CAN / ARINC 825 data bus. The ARINC 429 and CAN buses may be operated independently, allowing a host CPU to send and receive data on multiple buses, or the HI-3200 can be programmed to automatically re-format, re-label, re-packetize and retransmit data from ARINC 429 receive buses to ARINC 429 transmit buses, as well as from ARINC 429 to CAN or CAN to ARINC 429. A 32K x 8 on-board memory allows received data to be logically organized and automatically updated as new ARINC 429 labels or CAN frames are received. An auto-initialization feature allows configuration information to be up-loaded from an external EEPROM on reset to facilitate rapid start-up or operation without a host CPU. The HI-3200 interfaces directly with Holt’s HI-8448 octal ARINC 429 receiver IC, HI-8596 or HI-8592 ARINC 429 line drivers and HI-3110 integrated CAN controller / transceiver. The HI-3201 is identical to the HI-3200 except it es in an 80-pin PQFP package with eight instead of two ARINC 429 bit monitor pins. APPLICATION Features - Eight ARINC 429 Receive channels - Four ARINC 429 Transmit channels - CAN Bus / ARINC 825 Interface - 32KB on chip user-configurable data storage memory - Programmable received data filtering for ARINC 429 and CAN buses - Programmable transmission schedulers for periodic ARINC 429 and CAN message broadcasting - Flexible protocol bridge ARINC 429 to CAN and CAN to ARINC 429 - SPI Host CPU interface - Auto-initialization feature allows power-on configuration or independent operation without CPU PIN CONFIGURATION 64 ARX2P 63 ARX1N 62 ARX1P 61 ARX0N 60 ARX0P 59 SCANEN 58 CMISO 57 READY 56 ESCLK 55 EMOSI 54 ECSB...