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HOLTIC

HI-3282 Datasheet Preview

HI-3282 Datasheet

Serial Transmitter and Dual Receiver

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July 2013
HI-3282, HI-3282B
ARINC 429
Serial Transmitter and Dual Receiver
GENERAL DESCRIPTION
The HI-3282 is a silicon gate CMOS device for interfacing
the ARINC 429 serial data bus to a 16-bit parallel data bus.
Two receivers and an independent transmitter are
provided. The receiver input circuitry and logic are
designed to meet the ARINC 429 specifications for loading,
level detection, timing, and protocol. The ARINC inputs of
the HI-3282-10 configurations also have internal lightning
protection to DO-160D, Level 3. The transmitter section
provides the ARINC 429 communication protocol. An
external ARINC 429 Line Driver such as the Holt HI-3182 or
HI-8585 is required to translate the 5 volt logic outputs to
ARINC 429 drive levels.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers. The data bus interfaces with
CMOS and TTL.
Timing of all the circuitry begins with the master clock input,
CLK. For ARINC 429 applications, the master clock
frequency is 1 MHz.
Each independent receiver monitors the data stream with a
sampling rate 10 times the data rate. The sampling rate is
software selectable at either 1MHz or 125KHz. The results
of a parity check are available as the 32nd ARINC bit.
The transmitter has a First In, First Out (FIFO) memory to
store 8 ARINC words for transmission. The data rate of the
transmitter is software selectable by dividing the master
clock, CLK, by either 10 or 80. The master clock is used to
set the timing of the ARINC transmission within the required
resolution.
The HI-3282BPJx product has a minimum low speed data
rate of 6.5K BPS.
APPLICATIONS
• Avionics data communication
• Serial to parallel conversion
• Parallel to serial conversion
FEATURES
• ARINC specification 429 compatible
• Compatible with Industry-standard alternate
parts
• Small footprint 44-pin PQFP package option
• 16-Bit parallel data bus
• Direct receiver interface to ARINC bus
• Internal Lightning Protection of ARINC inputs
per DO-160D, Level 3 in -10 configurations
• Timing control 10 times the data rate
• Selectable data clocks
• Automatic transmitter data timing
• Self test mode
• Parity functions
• Low power, single 5 volt supply
• Industrial & extended temperature ranges
PIN CONFIGURATION (Top View)
N/C - 1
D/R1 - 2
D/R2 - 3
SEL - 4
EN1 - 5
EN2 - 6
BD15 - 7
BD14 - 8
BD13 - 9
BD12 - 10
BD11 - 11
HI-3282PQI
HI-3282PQI-10
HI-3282PQT
&
HI-3282PQT-10
33 - N/C
32 - N/C
31 - CWSTRX
30 - ENTX
29 - 429DO
28 -429DO
27 - TX/R
26 - PL2
25 - PL1
24 - BD00
23 - BD01
44-Pin Plastic Quad Flat Pack (PQFP)
(See page 10 for additional pin configurations)
(DS3282 Rev. O)
HOLT INTEGRATED CIRCUITS
www.holtic.com
07/13




HOLTIC

HI-3282 Datasheet Preview

HI-3282 Datasheet

Serial Transmitter and Dual Receiver

No Preview Available !

PIN DESCRIPTION
HI-3282, HI-3282B
SYMBOL
VCC
429DI1 (A)
429DI1 (B)
429DI2 (A)
429DI2 (B)
D/R1
D/R2
SEL
EN1
EN2
BD15
BD14
BD13
BD12
BD11
BD10
BD09
BD08
BD07
BD06
GND
BD05
BD04
BD03
BD02
BD01
BD00
PL1
PL2
TX/R
FUNCTION
POWER
INPUT
INPUT
INPUT
INPUT
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
POWER
I/O
I/O
I/O
I/O
I/O
I/O
INPUT
INPUT
OUTPUT
429DO
429DO
ENTX
CWSTR
CLK
TX CLK
MR
DBCEN
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
OUTPUT
INPUT
INPUT
DESCRIPTION
+5V ±5%
ARINC receiver 1 positive input
ARINC receiver 1 negative input
ARINC receiver 2 positive input
ARINC receiver 2 negative input
Receiver 1 data ready flag
Receiver 2 data ready flag
Receiver data byte selection (0 = BYTE 1) (1 = BYTE 2)
Data Bus control, enables receiver 1 data to outputs
Data Bus control, enables receiver 2 data to outputs if EN1 is high
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
0V
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Latch enable for byte 1 entered from data bus to transmitter FIFO.
Latch enable for byte 2 entered from data bus to transmitter FIFO. Must follow PL1.
Transmitter ready flag. Goes low when ARINC word loaded into FIFO. Goes high
after transmission and FIFO empty.
"ONES" data output from transmitter.
"ZEROES" data output from transmitter.
Enable Transmission
Clock for control word register
Master Clock input
Transmitter Clock equal to Master Clock (CLK), divided by either 10 or 80.
Master Reset, active low
Data bit control Enable. (Active low, with internal pull up to VDD).
HOLT INTEGRATED CIRCUITS
2


Part Number HI-3282
Description Serial Transmitter and Dual Receiver
Maker HOLTIC
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HI-3282 Datasheet PDF






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