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HMN1288DV Datasheet Preview

HMN1288DV Datasheet

Non-Volatile SRAM MODULE 1Mbit

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HANBit
HMN1288DV
Non-Volatile SRAM Module 1Mbit (128K x 8-Bit), 32Pin-DIP, 3.3V
Part No. HMN1288DV
GENERAL DESCRIPTION
The HMN1288DV Nonvolatile SRAM is a 1,048,576-bit static RAM organized as 131,072 bytes by 8 bits.
The HMN1288DV has a self-contained lithium energy source provide reliable non -volatility coupled with the unlimited
write cycles of standard SRAM and integral control circuitry, which constantly monitors the single 3.3V, supply for an out-
of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain
the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition
the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy
source is switched on to sustain the memory until after VCC returns valid.
The HMN1288DV uses extremely low standby current CMOS SRAM s, coupled with small lithium coin cells to provide
non-volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.
FEATURES
w Access time : 70, 85, 120, 150 ns
w High-density design : 1Mbit Design
w Battery internally isolated until power is applied
w Industry-standard 32-pin 128K x 8 pinout
w Unlimited write cycles
w Data retention in the absence of VCC
w 10-years minimum data retention in absence of power
w Automatic write-protection during power-up/power-down
cycles
w Data is automatically protected during power loss
w Conventional SRAM operation; unlimited write cycles
OPTIONS
w Timing
70 ns
85 ns
120 ns
150 ns
MARKING
- 70
- 85
-120
-150
PIN ASSIGNMENT
NC 1
A16 2
A14 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
32 VCC
31 A15
30 NC
29 /WE
28 A13
27 A8
26 A9
25 A11
24 /OE
23 A10
22 /CE
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
32-pin Encapsulated Package
URL : www.hbe.co.kr
Rev. 1.0 (June, 2004)
1
FinePrint pdfFactory 평 가 판 으 로 만 든 PDFhttp://www.softvision.co.kr
HANBit Electronics Co.,Ltd



Hanbit
Hanbit

HMN1288DV Datasheet Preview

HMN1288DV Datasheet

Non-Volatile SRAM MODULE 1Mbit

No Preview Available !

HMN1288DV pdf
HANBit
HMN1288DV
FUNCTIONAL DESCRIPTION
The HMN1288DV executes a read cycle whenever /WE is inactive(high) and /CE is active(low). The address specified by
the address inputs(A0-A16) defines which of the 131,072 bytes of data is accessed. Valid data will be available to the eight
data output drivers within tACC (access time) after the last address input signal is stable.
When power is valid, the HMN1288DV operates as a standard CMOS SRAM. During power -down and power-up cycles,
the HMN1288DV acts as a nonvolatile memory, automatically protectin g and preserving the memory contents.
The HMN1288DV is in the write mode whenever the /WE and /CE signals are in the active (low) state after address inputs
are stable. The later occurring falling edge of /CE or /WE will determine the start of the write cycle. The write cycle is
terminated by the earlier rising edge of /CE or /WE. All address inputs must be kept valid throughout the write cycle. /WE
must return to the high state for a minimum recovery time (t WR) before another cycle can be initiated. The /OE control
signal should be kept inactive (high) during write cycles to avoid bus contention. However, if the output bus been enabled
(/CE and /OE active) then /WE will disable the outputs in t ODW from its falling edge.
The HMN1288DV provides full functional capability for Vcc greater than 3.0V and write protects by 2.8 V nominal. Power-
down/power-up control circuitry constantly monitors the V CC supply for a power-fail-detect threshold VPFD. When VCC falls
below the VPFD threshold, the SRAM automatically write-protects the data. All inputs to the RAM become dont careand
all outputs are high impedance. As Vcc falls below approximately 3 V, the power switching circuit connects the lithium
energy soure to RAM to retain data. During power-up, when Vcc rises above approximately 3.0 volts, the power switching
circuit connects external Vcc to the RAM and disconnects the lithium energy source. Normal RAM operation can resume
after Vcc exceeds 4.5 volts.
BLOCK DIAGRAM
/OE
/W E
/CE
128K x 8
SRAM
Block
A0-A16
DQ0-DQ7
Power
/CE CON
Power Fail
Control
VCC
Lithium
Cell
PIN DESCRIPTION
A0-A16 : Address Input
/CE : Chip Enable
Vss : Ground
DQ0-DQ7 : Data In / Data Out
/WE : Write Enable
/OE : Output Enable
VCC : Power (+3.3V)
NC : No Connection
URL : www.hbe.co.kr
Rev. 1.0 (June, 2004)
2
FinePrint pdfFactory 평 가 판 으 로 만 든 PDFhttp://www.softvision.co.kr
HANBit Electronics Co.,Ltd


Part Number HMN1288DV
Description Non-Volatile SRAM MODULE 1Mbit
Maker Hanbit
Total Page 9 Pages
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