Hi3516D Datasheet | Hisilicon

features are stipulated by the contract made between Hi Silicon and the customer. All or part of the products, services and features described in this document may not be within the purchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information, and remendations in this document are provided "AS IS" without warranties, guarantees or representations of any kind, either express or implied. The information in this document is subject to change without notice. Every effort has been made in the preparation of this document to ensure accuracy of the contents, but all statements, information, and remendations in this document do not constitute a warranty of any kind, express or implied. Hi Silicon Technologies Co., Ltd. Address: Website: Email: New R&D Center, Wuhe Road, Bantian, Longgang District, Shenzhen 518129 P. R. China http://.hisilicon. support@hisilicon. Hi3516D V300 Hi3516D V300 Professional Smart IP Camera So C Key Specifications Processor Core Dual-core ARM Cortex-A7@ 900 MHz, 32 KB I-cache, 32 KB D-cache, 256 KB L2 cache Neon acceleration and integrated FPU VEDU H.264 BP/MP/HP H.265 MP I-/P-frames and Smart P reference. MJPEG/JPEG baseline VEDU Performance Up to 2688-pixel wide and 2688 x 1944 resolution for H.264/H.265 encoding and decoding. Only the decoding of self-encoded streams is supported.. Real-time multi-stream H.264/H.265 encoding and decoding: - 2688 x 1536@30 fps encoding +720 x 480@30 fps encoding + 360 x 240@30 fps encoding - 2688 x 1944@20 fps encoding +720 x 480@20 fps encoding + 360 x 240@20 fps encoding - 1920 x 1080@30 fps encoding + 720 x 480@30 fps encoding + 1920 x 1080@30 fps decoding JPGE encoding and decoding performance: 16M (4608 x 3456) @10 fps Five bit rate control modes (CBR, VBR, Fix Qp, AVBR, and Qp Map) Up to 50 Mbit/s output bit rate Up to 8-ROI encoding Smart Video Analysis Neural network acceleration engine with processing performance up to 1.0 TOPS Smart puting acceleration...