Datasheet4U Logo Datasheet4U.com

HD74AC74 - Dual D-Type Positive Edge-Triggered Flip-Flop

Description

The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on the positive edge of the clock pulse.

Features

  • Asynchronous Inputs: Low input to SD (Set) sets Q to High level Low input to CD (Clear) sets Q to Low level Clear and Set are independent of clock Simultaneous Low on CD and SD makes both Q and Q High.
  • Outputs Source/Sink 24 mA HD74AC74 Pin Arrangement CD1 1 D1 2 CP1 3 SD1 4 Q1 5 Q1 6 GND 7 (Top view) D2 CD2 CP2 SD2 CP1 D1 SD1 CD1 14 VCC 13 CD2 12 D2 11 CP2 10 SD2 9 Q2 8 Q2 Q 1 Q1 Q 2 Q2 Logic Symbol SD1 D1 CP1 Q1 Q1 D2 SD2 Q2 CP2 Q2 CD1 CD2 Pin Names D1, D2 CP1, CP2 C D1, C.

📥 Download Datasheet

Datasheet preview – HD74AC74

Datasheet Details

Part number HD74AC74
Manufacturer Hitachi Semiconductor
File Size 61.42 KB
Description Dual D-Type Positive Edge-Triggered Flip-Flop
Datasheet download datasheet HD74AC74 Datasheet
Additional preview pages of the HD74AC74 datasheet.
Other Datasheets by Hitachi Semiconductor

Full PDF Text Transcription

Click to expand full text
HD74AC74 Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.
Published: |