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HD74HC444 - (HD74HC442 - HD74HC444) Quad. Tridirectional Bus Transceiver(with noninverted/inverted 3-state outputs)

This page provides the datasheet information for the HD74HC444, a member of the HD74HC442 (HD74HC442 - HD74HC444) Quad. Tridirectional Bus Transceiver(with noninverted/inverted 3-state outputs) family.

Description

These bus transceivers are designed for a synchronous three-way communication between four-line data buses.

They give the designer a choice of selecting inverting, noninverting or a combination of inverting and noninverting data paths with 3-state outputs.

Features

  • High Speed Operation High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC442/HD74HC443HD74HC444 Function Table Inputs CS H X X X X X L L L L L L L L L S1 X H X L L H L L H L L H L L H S0 X H X L H L L H L L H L L H L GA X X H X H H X L L X H L X L H GB X X H H X H L X L L X H H X L GC X X H H H X L L X H L X L H X.

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Datasheet Details

Part number HD74HC444
Manufacturer Hitachi Semiconductor
File Size 82.80 KB
Description (HD74HC442 - HD74HC444) Quad. Tridirectional Bus Transceiver(with noninverted/inverted 3-state outputs)
Datasheet download datasheet HD74HC444 Datasheet
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Full PDF Text Transcription

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HD74HC442/HD74HC443/HC74HC444 Quad. Tridirectional Bus Transceiver (with noninverted 3-state outputs) Quad. Tridirectional Bus Transceiver (with inverted 3-state outputs) Quad Tridirectional Bus Transceiver (with noninverted/inverted 3-state outputs) Description These bus transceivers are designed for a synchronous three-way communication between four-line data buses. They give the designer a choice of selecting inverting, noninverting or a combination of inverting and noninverting data paths with 3-state outputs. The S 0 and S1 inputs select the bus from which data are to be transferred. The G inputs enable the bus or buses to which data are to be transferred. The port for any bus selected for input and any other bus not enabled for output will be at high impedance.
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