octal bus transceivers (with 3-state outputs).
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* LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to B) = 14.5 ns typ (CL = 50 .
Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G ), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A. The HD74HCT640 transfers .
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