HD74LS107A
Overview
Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference val...
| Part | HD74LS107A |
|---|---|
| Description | Dual J-K Negative-edge-triggered Flip-Flops |
| Manufacturer | Hitachi Semiconductor |
| Size | 70.03 KB |
Related Datasheets
| Part Number | Manufacturer | Description |
|---|---|---|
| HD74LS107A | Renesas | Dual J-K Negative-edge-triggered Flip-Flops |
| HD74LS107AP | Renesas | Dual J-K Negative-edge-triggered Flip-Flops |
| HD74LS10P | Renesas | Triple 3-Input Positive NAND Gates |
| HD74LS10 | Renesas | Triple 3-Input Positive NAND Gates |