HM62W4100HC
Description
The HM62W4100HC is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed and high density memory, such as cache and buffer memory in system. The HM62W4100HC is packaged in 400-mil 32-pin SOJ for high density surface mounting.
Features
- Single supply : 3.3 V ± 0.3 V
- Access time : 10 ns (max)
- pletely static memory No clock or timing strobe required
- Equal access and cycle times
- Directly TTL patible All inputs and outputs
- Operating current : 115 m A (max)
- TTL standby current : 40 m A (max)
- CMOS standby current : 5 m A (max) : 1 m A (max) (L-version)
- Data retension current : 0.6 m A (max) (L-version)
- Data retension voltage: 2 V (min) (L-version)
- Center VCC and VSS type pinout
Preliminary: The specification of this device are subject to change without...
