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Honeywell International Electronic Components Datasheet

HLX6256 Datasheet

32K x 8 STATIC RAM-Low Power SOI

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Military & Space Products
32K x 8 STATIC RAM—Low Power SOI
HLX6256
FEATURES
RADIATION
• Fabricated with RICMOSIV Silicon on Insulator (SOI)
0.55 µm Low Power Process
• Total Dose Hardness through 1x106 rad(SiO2)
• Neutron Hardness through 1x1014 cm-2
• Dynamic and Static Transient Upset Hardness
through 1x109 rad(Si)/s
• Dose Rate Survivability through 1x1011 rad(Si)/s
• Soft Error Rate of <1x10-10 upsets/bit-day
• Latchup Free
OTHER
• Read/Write Cycle Times
17 ns (Typical)
25 ns (-55 to 125°C)
• Typical Operating Power <10 mW/MHz
• Asynchronous Operation
• JEDEC Standard Low Voltage
CMOS Compatible I/O
• Single 3.3 V ± 0.3V Power Supply
• Packaging Options
- 28-Lead Flat Pack (0.500 in. x 0.720 in.)
- 28-Lead DIP, MIL-STD-1835, CDIP2-T28
- 36-Lead Flat Pack (0.630 in. x 0.650 in.)
- Various Multi-Chip Module (MCM) Configurations
GENERAL DESCRIPTION
The 32K x 8 Radiation Hardened Static RAM is a high
performance 32,768 word x 8-bit static random access
memory with industry-standard functionality. It is fabri-
cated with Honeywell’s radiation hardened technology,
and is designed for use in low voltage systems operating in
radiation environments. The RAM operates over the full
military temperature range and requires only a single 3.3 V
± 0.3V power supply. The RAM is compatible with JEDEC
standard low voltage CMOS I/O. Power consumption is
typically less than 10 mW/MHz in operation, and less than
2 mW when de-selected. The RAM read operation is fully
asynchronous, with an associated typical access time of 14
ns at 3.3 V.
Honeywell’s enhanced SOI RICMOSIV (Radiation Insen-
sitive CMOS) technology is radiation hardened through the
use of advanced and proprietary design, layout and pro-
cess hardening techniques. The RICMOSIV low power
process is a SIMOX CMOS technology with a 150 Å gate
oxide and a minimum drawn feature size of 0.7 µm (0.55 µm
effective gate length—Leff). Additional features include
tungsten via plugs, Honeywell’s proprietary SHARP pla-
narization process and a lightly doped drain (LDD) struc-
ture for improved short channel reliability. A 7 transistor
(7T) memory cell is used for superior single event upset
hardening, while three layer metal power bussing and the
low collection volume SIMOX substrate provide improved
dose rate hardening.


Honeywell International Electronic Components Datasheet

HLX6256 Datasheet

32K x 8 STATIC RAM-Low Power SOI

No Preview Available !

HLX6256
FUNCTIONAL DIAGRAM
A:0-8,12-13
11
CE
NCS
NWE
NOE
A:9-11, 14
4
Row
Decoder
32,768 x 8
Memory
Array
•••
Column Decoder
Data Input/Output
WE • CS • CE
8
8
DQ:0-7
NWE • CS • CE • OE
(0 = high Z)
1 = enabled
Signal #
Signal
All controls must be
enabled for a signal to
pass. (#: number of
buffers, default = 1)
SIGNAL DEFINITIONS
A: 0-14
DQ: 0-7
NCS
NWE
NOE
CE*
Address input pins which select a particular eight-bit word within the memory array.
Bidirectional data pins which serve as data outputs during a read operation and as data inputs during a write
operation.
Negative chip select, when at a low level allows normal read or write operation. When at a high level NCS
forces the SRAM to a precharge condition, holds the data output drivers in a high impedance state and
disables all input buffers except CE. If this signal is not used it must be connected to VSS.
Negative write enable, when at a low level activates a write operation and holds the data output drivers in a
high impedance state. When at a high level NWE allows normal read operation.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS, NWE and CE. If this signal is not used it must
be connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the SRAM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
TRUTH TABLE
NCS
L
L
H
X
CE* NWE NOE
MODE
DQ
H H L Read Data Out
H
LX
Write
Data In
X XX XX Deselected High Z
L XX XX Disabled High Z
*Not Available in 28-Lead DIP or 28-Lead Flat Pack
2
Notes:
X: VI=VIH or VIL
XX: VSSVIVDD
NOE=H: High Z output state maintained for
NCS=X, CE=X, NWE=X


Part Number HLX6256
Description 32K x 8 STATIC RAM-Low Power SOI
Maker Honeywell
Total Page 12 Pages
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