H55S2562JFR-75M - 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O

This page provides the datasheet information for the H55S2562JFR-75M, a member of the H55S2562JFR-60M 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O family.

Description

and is subject to change without notice.

Hynix does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK).

SK Hynix

📥 Download Datasheet

H55S2562JFR-75M 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O by Hynix Semiconductor - Datasheet Preview — Datasheet preview – H55S2562JFR-75M

Datasheet Details

Part number	H55S2562JFR-75M
Manufacturer	SK Hynix
File Size	751.58 KB
Description	256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O
Datasheet	H55S2562JFR-75M Datasheet
Additional preview pages of the H55S2562JFR-75M datasheet.

📁 Similar Datasheet

H5551 - NPN SILICON TRANSISTOR (SHANTOU HUASHAN ELECTRONIC DEVICES)
H556 - PNP Silicon Transistor (Shantou Huashan Electronic)
H557 - NPN SILICON TRANSISTOR (SHANTOU HUASHAN ELECTRONIC DEVICES)
H558 - NPN SILICON TRANSISTOR (SHANTOU HUASHAN ELECTRONIC DEVICES)

Other Datasheets by Hynix Semiconductor

H55S2562JFR-60M - 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O
H55S2562JFR-A3M - 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O
H55S2532JFR-60M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2532JFR-75M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2532JFR-A3M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2622JFR-60M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2622JFR-75M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2622JFR-A3M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O

Full PDF Text Transcription

Click to expand full text

www.DataSheet4U.com 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O Specification of 256M (16Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,194,304 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.1 / July. 2009 1 11 www.DataSheet4U.com 256Mbit (16Mx16bit) Mobile SDR H55S2562JFR Series Document Title 4Bank x 4M x 16bits Synchronous DRAM Revision History Revision No. 0.1 0.2 1.0 1.1 Initial Draft IDD Specification updated The final version Omit a typo in package information History Draft Date May 2008 May 2008 Nov. 2008 July. 2009 Remark Preliminary Preliminary Rev 1.1 / July. 2009 2 11 www.DataSheet4U.

Published: May 3, 2010 |