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H5DU1262GTR Datasheet 128Mb DDR SDRAM

Manufacturer: SK Hynix

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General Description

and is subject to change without notice.

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Overview

www.DataSheet4U.com 128Mb DDR SDRAM H5DU1262GTR This document is a general.

Key Features

  • VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333 ,400 and 500) All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chi.

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