* VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333 and 400) All inputs and outputs are compatible with SSTL_2 interface Fully differen.

which requires large memory density and high bandwidth. This Hynix 64Mb DDR SDRAMs offer fully synchronous operations re.

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 /July. 2008 1 Release H5DU6462CTR Series Revision History Revision No. 0.1 First .

H5DU1262GTR

H5DU2562GFR

H5DU2562GTR

H5DU2582GTR

H5DU5162EFR

H5DU5162ETR

H5DU5182EFR

H5DU5182ETR

H5004

H5004NL

H5007

H5007NL

H5008NL