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ICS43002I-41 - FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR

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Datasheet Details

Part number ICS43002I-41
Manufacturer ICS
File Size 302.67 KB
Description FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR
Datasheet download datasheet ICS43002I-41 Datasheet

General Description

The ICS843002I-41 is a member of the HiperClockS™ family of high performance clock HiPerClockS™ solutions from ICS.

The ICS843002I-41 is a PLL based synchronous clock generator that is optimized for SONET/SDH line card applications where jitter attenuation and frequency translation is needed.

The device contains two internal PLL stages that are cascaded in series.

Overview

www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc.

Key Features

  • (2) Differential LVPECL outputs.
  • Selectable CLKx, nCLKx differential input pairs.
  • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL or single-ended LVCMOS or LVTTL levels.
  • Maximum output frequency: 700MHz.
  • FemtoClock VCO frequency range: 560MHz - 700MHz.
  • RMS phase jitter @ 155.52MHz, using a 19.44MHz crystal (12kHz to 20MHz): 0.81ps (typical).
  • Full 3.3V or mixed 3.3V core/2.5V out.

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