JITTER Datasheet | Specifications & PDF Download

CDCLVD1216 www.ti.com SCAS900B – OCTOBER 2010 – REVISED JANUARY 2011 2:16 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD1216 FEATURES 1

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Crystal oscillator LOW-JITTER SAW OSCILLATOR (SPSO) OUTPUT : LV-PECL, LVDS Product Number (please contact us) XG-2121CA P: X1M000311xxxx00 XG-2121CA

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Integrated Circuit Systems, Inc. ICS84329 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER FEATURES • Fully integrated P

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www.DataSheet4U.com 700MHZ, FEMTOCLOCKTM VCXO BASED SONET/SDH JITTER ATTENUATOR ICS843002I-41 Features • • • • • • • • • Two Differential LVPECL out

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FemtoClock® NG Jitter Attenuator and Clock Synthesizer 8V19N474 Datasheet Description The 8V19N474 is a fully integrated FemtoClock NG Jitter Attenu

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FemtoClock® NG Jitter Attenuator and Clock Synthesizer 8V19N490A Datasheet Description The 8V19N490A is a fully integrated FemtoClock® NG jitter att

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FemtoClock® NG Jitter Attenuator and Clock Synthesizer 8V19N490B Datasheet Description The 8V19N490B is a fully integrated FemtoClock® NG jitter att

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AU5325: 10 Outputs, Quad PLL Frequency Translation, Jitter Attenuator General Description Features AU5325 is a programmable Quad Fractional Frequen

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Si5316 PRECISION CLOCK JITTER ATTENUATOR Features  Fixed frequency jitter attenuator  Dual clock inputs with integrated with selectable clock ra

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Integrated Circuit Systems, Inc. ICS84329 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER FEATURES • Fully integrated P

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Integrated Circuit Systems, Inc. ICS84329 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER FEATURES • Fully integrated P

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www.DataSheet4U.com 19-2390; Rev 0; 4/02 Lowest Jitter Quad PECL-to-ECL Differential Translators General Description The MAX9424–MAX9427 high-speed,

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www.DataSheet4U.com 19-2390; Rev 0; 4/02 Lowest Jitter Quad PECL-to-ECL Differential Translators General Description The MAX9424–MAX9427 high-speed,

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www.DataSheet4U.com ZL30145 SyncE (10 GbE) SONET/SDH Rate Conversion and Jitter Attenuator PLL Short Form Data Sheet February 2009 Features • Can be

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www.DataSheet4U.com FEMTOCLOCKS™ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR ICS843002I-72 GENERAL DESCRIPTION The ICS843002I-72 is a member

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PRELIMINARY Integrated Circuit Systems, Inc. ICS8430-111 700MHZ, LOW JITTER DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER FEATURES • Dual differ

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PRELIMINARY Integrated Circuit Systems, Inc. ICS8430-51 600MHZ, LOW JITTER LVCMOS/ LVTTL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER FEATURES • Dual differ

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Data Sheet Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs AD9523 FEATURES Output frequency: <1 MHz to 1 GHz Start-up f

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ATS627LSG True Zero Speed, Low Jitter, High Accuracy Position Sensor IC Features and Benefits • Highly accurate in presence of: ▫ Anomalous target ge

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Si53303 DUAL 1:5 LOW JITTER BUFFER/LEVEL TRANSLATOR Features  10 differential or 20 LVCMOS outputs Independent VDD and VDDO :  Ultra-low additi

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