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CDCLVD1216 2:16 Low Additive Jitter LVDS Buffer

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Description

CDCLVD1216 www.ti.com SCAS900B * OCTOBER 2010 * REVISED JANUARY 2011 2:16 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD1.
The CDCLVD1216 clock buffer distributes one of two selectable clock inputs (IN0, IN1) to 16 pairs of differential LVDS clock outputs (OUT0, OUT15) wit.

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Features

* 1
* 2:16 Differential Buffer
* Low Additive Jitter:

Applications

* Telecommunications/Networking
* Medical Imaging
* Test and Measurement Equipment
* Wireless Communications

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Texas Instruments CDCLVD1216-like datasheet