* 1 1:4 Differential Buffer
* Low Additive Jitter: < 300-fs RMS in 10-kHz to 20- MHz
* Low Output Skew of 20 ps (Maximum)
* Selectable Divider Ratio 1, /2, /4
* Universal Input Accepts LVDS, LVPECL, and CML
* 4 LVDS Outputs, ANSI EIA/TIA-644A Standard C
CDCLVD1213 Datasheet (874.40 KB)
CDCLVD1213
874.40 KB
1:4 low additive jitter lvds buffer.
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CDCLVD1213
SCAS897A
* JULY 2010
* REVISED OC.
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