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CDCLVD110 PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER

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Description

www.ti.com CDCLVD110 SCAS684C * SEPTEMBER 2002 * REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10.
The CDCLVD110 clock driver distributes one pair of differential LVDS clock inputs (either CLK0 or CLK1) to 10 pairs of differential clock outputs (Q0,.

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Features

* 1
* Low-Output Skew

Applications

* Distributes One Differential Clock Input to 10 LVDS Differential Clock Outputs
* VCC range 2.5 V ±5%
* Typical Signaling Rate Capability of Up to 1.1 GHz
* Configurable Register (SI/CK) Individually Enables Disables Outputs, Selectable CLK0, CLK0 or CLK1, CLK1 Input

CDCLVD110 Distributors

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