ICS889874
ICS889874 is DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER manufactured by ICS.
FEATURES
- 2 LVPECL outputs
- Frequency divide select options: ÷ 1, ÷ 2, ÷4, ÷8, ÷16
- IN, n IN input can accept the following differential input levels: LVPECL, LVDS, CML
- Output frequency: > 2.5GHz
- Output skew: 5ps (typical)
- Part-to-part skew: TBD
- Additive jitter, RMS: <0.03ps (design target)
- Supply voltage range: (LVPECL), 2.375V to 3.465V Supply voltage range: (ECL), -3.465V to -2.375V
- -40°C to 85°C ambient operating temperature
- Pin patible with SY89874U
GENERAL DESCRIPTION
The ICS889874 is a high speed 1:2 Differentialto-LVPECL Buffer/Divider and is a member of Hi Per Clock S™ the Hi Per Clock S ™ family of high performance clock solutions from ICS. The ICS889874 has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resistors, allowing it to interface with several differential signal types while minimizing the number of required external ponents. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.
BLOCK DIAGRAM
S2
PIN ASSIGNMENT
VCC S0
Q0 n RESET
Enable FF Enable MUX
1 2 3 4
16 15 14 13 12 11 10 9 5
S2
S1
IN VT VREF_AC n IN n Q0 Q1 Q0
0 n Q1
6 nc
8 n RESET
REV. A MAY 19, 2004 n Q0
IN VT n IN S0
Decoder
Q1 n Q1
00 01 10 11
÷2 ÷4 ÷8 ÷16
16-Lead VFQFN 3mm x 3mm x 0.95 package body K Package Top View
S1
VREF_AC...
