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ICS889872 - DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION

Datasheet Summary

Description

The ICS889872 is a high speed Differential-toLVDS Buffer/Divider w/Internal Termination and is a HiPerClockS™ member of the HiPerClockS™family of high performance clock solutions from IDT.

The ICS889872 has a selectable ÷2, ÷4, ÷8, ÷16 output dividers.

Features

  • Three LVDS outputs Frequency divide select options: ÷4, ÷6: >2GHz, ÷8, ÷16: >1.6GHz IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML Output frequency: >2GHz Cycle-to-cycle jitter: 1ps (typical) Total jitter: 10ps (typical) Output skew: 7ps (typical), QA/nQA outputs Part-to-part skew: 250ps (typical) Propagation Delay: 750ps (typical), QA/nQA o.

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Datasheet Details

Part number ICS889872
Manufacturer IDT
File Size 1.09 MB
Description DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
Datasheet download datasheet ICS889872 Datasheet
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www.DataSheet4U.com PRELIMINARY DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION ICS889872 Features • • • • • • • • • • • • Three LVDS outputs Frequency divide select options: ÷4, ÷6: >2GHz, ÷8, ÷16: >1.6GHz IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML Output frequency: >2GHz Cycle-to-cycle jitter: 1ps (typical) Total jitter: 10ps (typical) Output skew: 7ps (typical), QA/nQA outputs Part-to-part skew: 250ps (typical) Propagation Delay: 750ps (typical), QA/nQA outputs Full 2.
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