ICS889872 - DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION

Product Overview

IDT

ICS889872 DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION by IDT - Datasheet Preview — Datasheet preview – ICS889872

Datasheet Details

Part number	ICS889872
Manufacturer	IDT
File Size	1.09 MB
Description	DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
Datasheet	ICS889872 Datasheet
Additional preview pages of the ICS889872 datasheet.

Product details

Description

The ICS889872 is a high speed Differential-toLVDS Buffer/Divider w/Internal Termination and is a HiPerClockS™ member of the HiPerClockS™family of high performance clock solutions from IDT.

Features

Three LVDS outputs Frequency divide select options: ÷4, ÷6: >2GHz, ÷8, ÷16: >1.6GHz IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML Output frequency: >2GHz Cycle-to-cycle jitter: 1ps (typical) Total jitter: 10ps (typical) Output skew: 7ps (typical), QA/nQA outputs Part-to-part skew: 250ps (typical) Propagation Delay: 750ps (typical), QA/nQA o.

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Published: Oct 2, 2007 |