524S buffer equivalent, low skew 1 to 4 clock buffer.
* Low additive phase jitter RMS: 50fs
* Extremely low skew outputs (50ps)
* Low cost clock buffer
* Packaged in 8-pin SOIC and 8-pin DFN, Pb-free
* In.
The 524S is a low skew, single input to four output, clock buffer. The 524S has best in class additive phase Jitter of sub 50 fsec.
IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Cont.
Image gallery
TAGS
Download (Size : 163.94KB)