Datasheet Summary
2-output 3.3V PCIe Zero-Delay Buffer
9DBL0242 / 9DBL0252
Description
The 9DBL0242 / 9DBL0252 devices are 3.3V members of IDT's Full-Featured PCIe family. The devices support PCIe Gen1-4 mon Clocked (CC) and PCIe Gen2 Separate Reference Independent Spread (SRIS) systems. It offers a choice of integrated output terminations providing direct connection to 85 or 100 transmission lines. The 9DBL02P2 can be factory programmed with a user-defined power up default SMBus configuration.
Remended Application
PCIe Gen1-4 clock distribution for Riser Cards, Storage, Networking, JBOD, munications, Access Points
Output Features
- 2
- 1-200 MHz Low-Power (LP) HCSL DIF pairs
-...
