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9DBL0453 Datasheet

Manufacturer: IDT

This datasheet includes multiple variants, all published together in a single manufacturer document.

9DBL0453 datasheet preview

Datasheet Details

Part number 9DBL0453
Datasheet 9DBL0453 9DBL0443 Datasheet (PDF)
File Size 323.43 KB
Manufacturer IDT
Description 4-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0453 page 2 9DBL0453 page 3

9DBL0453 Overview

The 9DBL04x3 devices are 3.3V members of IDT's Full-Featured PCIe clock family. They support PCIe Gen1-4 mon Clock (CC) architectures and also support NVLINK applications. The 9DBL04x3 parts have a Loss of Signal (LOS) indicator to support fault-tolerant, high reliability systems.

9DBL0453 Key Features

  • Loss Of Signal (LOS) open drain output
  • 1-200 MHz Low-Power (LP) HCSL DIF pairs
  • 9DBL0443 default Zout = 100Ω
  • 9DBL0453 default Zout = 85Ω
  • Easy AC-coupling to other logic families, see IDT application note AN-891
  • PCIe Gen1-4 CC pliant in ZDB or fanout buffer mode
  • Supports NVLINK at 156.25M in ZDB or fanout buffer mode
  • DIF cycle-to-cycle jitter <50ps
  • DIF output-to-output skew < 50ps
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More Datasheets from IDT

See all IDT datasheets

Part Number Description
9DBL0452 4-Output 3.3V PCIe Zero-delay Buffer
9DBL0455 PCIe Gen1-5 Clock Fanout Buffers
9DBL04 4-output 3.3V PCIe Zero-delay Buffer
9DBL0442 4-Output 3.3V PCIe Zero-delay Buffer
9DBL0443 4-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL02 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0242 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0243 2-Output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0252 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0253 2-Output 3.3V LP-HCSL Zero-Delay Buffer

9DBL0453 Distributor

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