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ICS87008I - 1-TO-8 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR

Description

The ICS87008I is a low skew, 1:8 LVCMOS/LVTTL Clock Generator.

The device has 2 banks of 4 outputs and each bank can be independently selected for ÷1 or ÷2 frequency operation.

Features

  • Eight LVCMOS/LVTTL outputs (2 banks of 4 outputs).
  • Selectable differential CLK1, nCLK1 or LVCMOS clock input.
  • CLK1, nCLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • CLK0 supports the following input types: LVCMOS, LVTTL.
  • Maximum output frequency: 250MHz.
  • Independent bank control for ÷1 or ÷2 operation.
  • Glitchless, asynchronous clock enable/disable.
  • Output skew: 105ps (maximum).

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Datasheet Details

Part number ICS87008I
Manufacturer IDT
File Size 277.92 KB
Description 1-TO-8 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
Datasheet download datasheet ICS87008I Datasheet

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Full PDF Text Transcription

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ICS87008I LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR GENERAL DESCRIPTION The ICS87008I is a low skew, 1:8 LVCMOS/LVTTL Clock Generator. The device has 2 banks of 4 outputs and each bank can be independently selected for ÷1 or ÷2 frequency operation. Each bank also has its own power supply pins so that the banks can operate at the following different voltage levels: 3.3V, 2.5V, and 1.8V. The low impedance LVCMOS/ LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The divide select inputs, DIV_SELA and DIV_SELB, control the output frequency of each bank. The output banks can be independently selected for ÷1 or ÷2 operation. The bank enable inputs, CLK_ENA and CLK_ENB, support enabling and disabling each bank of outputs individually.
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