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IDT2305A - 3.3V ZERO DELAY CLOCK BUFFER

Description

The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.

The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

Features

  • IDT2305A Phase-Lock Loop Clock Distribution 10MHz to 133MHz operating frequency Distributes one clock input to one bank of five outputs Zero Input-Output Delay Output Skew < 250ps Low jitter.

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Datasheet Details

Part number IDT2305A
Manufacturer IDT
File Size 82.03 KB
Description 3.3V ZERO DELAY CLOCK BUFFER
Datasheet download datasheet IDT2305A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK BUFFER FEATURES: • • • • • • • • • • • • IDT2305A Phase-Lock Loop Clock Distribution 10MHz to 133MHz operating frequency Distributes one clock input to one bank of five outputs Zero Input-Output Delay Output Skew < 250ps Low jitter <200 ps cycle-to-cycle IDT2305A-1 for Standard Drive IDT2305A-1H for High Drive No external RC network required Operates at 3.3V VDD Power down mode Available in SOIC package DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.
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