900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




Integrated Device Technology Electronic Components Datasheet

IDT5V927 Datasheet

Quad Output Clock Generator

No Preview Available !

IDT5V927
QUAD OUTPUT CLOCK GENERATOR
QUAD OUTPUT
CLOCK GENERATOR
INDUSTRIALTEMPERATURERANGE
IDT5V927
FEATURES:
• 3V to 3.6V operating voltage
• 50MHz to 160MHz output frequency range
• Input from fundamental crystal oscillator or external source
• Internal PLL feedback (loading feedback output relative to
other outputs, adjusts propagation delay between REF inputs
and outputs)
• Select inputs (S[1:0]) for FB divide selection (multiply ratio of 2,
3, 4, 4.25, 5, 6, 6.25, and 8)
• Low jitter
• PLL bypass for testing and power-down control (S1 = H, S0 = H,
powers part down <500µA)
• Available in TSSOP package
DESCRIPTION:
The IDT5V927 is a low-cost, low skew, low jitter, and high-performance
clock synthesizer. It has been specially designed to interface with Gigabit
Ethernet (125MHz), Fibre Channel (106.25MHz), and OC-3 (155.52MHz)
applications. It can be programmed to provide output frequencies ranging
from 50MHz to 160MHz, with input frequencies ranging from 6.25MHz to
80MHz.
The IDT5V927 includes an internal RC filter that provides excellent jitter
characteristics and eliminates the need for external components. When
using the optional crystal input, the chip accepts a 10 - 40MHz fundamental
mode crystal with a maximum equivalent series resistance of 50.
APPLICATIONS:
• Gigabit ethernet
• Router
• Network switches
• SAN
• Instrumentation
• Fibre channel
FUNCTIONAL BLOCK DIAGRAM
VCO DIVIDE
1/N
OE
REF
PHASE
DETECTOR
CHARGE
PUMP
LOOP
FILTER
X2
CRYSTAL
OSCILLATOR
X1
SELECT MODE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
c 2003 Integrated Device Technology, Inc.
S1 S0
1
VCO
0
1
Q0
Q1
Q2
Q3
FEBRUARY 2003
DSC 5853/6


Integrated Device Technology Electronic Components Datasheet

IDT5V927 Datasheet

Quad Output Clock Generator

No Preview Available !

IDT5V927
QUAD OUTPUT CLOCK GENERATOR
INDUSTRIALTEMPERATURERANGE
PIN CONFIGURATION
REF
X1
X2
VDD
Q0
GND
Q1
VDDQ
1
2
3
4
5
6
7
8
16 S0
15 S1
14 OE
13 GND
12 Q3
11 GND
10 Q2
9 VDDQ
TSSOP
TOP VIEW
CRYSTAL SPECIFICATION
The crystal oscillators should be fundamental mode quartz crystals:
overtone crystals are not suitable. Crystal frequency should be specified
for parallel resonance with 50maximum equivalent series resonance.
Crystal tuning capacitors should be connected from X2/REF to GND and from
X1 to GND.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description
Max. Unit
VDD/VDDQ Supply Voltage to Ground
– 0.5 to +4.6
V
VI InputVoltage
– 0.5 to +4.6
V
IO OutputCurrent
±50 mA
TSTG StorageTemperature
– 65 to +150
°C
TJ JunctionTemperature
150 °C
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
PIN DESCRIPTION
Pin Name Type Description
S[1:0]
I Three level divider/mode select pins. Float to MID.
OE I Outputenablebar. OE hasapull-down. OutputQ[1:3]tristated
when HIGH. Output Q0 remains running when in PLL mode
and tri-states when in TEST mode.
X1 I Crystaloscillatorinput.ConnecttoGNDifoscillatornotrequired.
X2 I Crystal oscillator output. Leave unconnected for clock input.
REF I Input clock. Connect to X2 if crystal oscillator is used.
Q[1:3] O Output at N*REF frequency
Q0 O Output at N*REF internally connected for PLL feedback
VDDQ PWR Power supply for the device outputs. Connect to VDDon PCB.
VDD
GND
PWR
PWR
Power supply for the device core and inputs. Connect to VDD
on PCB.
Ground supply
DIVIDE SELECTION TABLE(1)
S1 S0
Divide-by-N Value
Mode
LL
2 PLL
LM
3 PLL
LH
4 PLL
ML
4.25 PLL
MM
5 PLL
MH
6 PLL
HL
6.25 PLL
HM
8 PLL
H
H
TEST
TEST(2)
NOTES:
1. H = HIGH
M = MEDIUM
L = LOW
2. Test mode for low frequency testing. In this mode, REF clock bypasses the VCO (VCO powered down) and the crystal oscillator is powered down.
2


Part Number IDT5V927
Description Quad Output Clock Generator
Maker IDT
PDF Download

IDT5V927 Datasheet PDF






Similar Datasheet

1 IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
Integrated Device
2 IDT5V927 Quad Output Clock Generator
IDT
3 IDT5V928 8 OUTPUT CLOCK GENERATOR
IDT





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z



Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy