IDT7174S Description
The IDT7174 is a high-speed cache address parator subsystem consisting of a 65,536 bit static RAM organized as 8K x 8 and an 8-bit parator.
IDT7174S Key Features
- High-speed address/access time -Military: 45/55ns (max.) -mercial: 35/45ns (max.)
- High-speed chip select access time -Military: 25/30ns (max.) -mercial: 20/25ns (max.)
- High-speed parison time -Military: 45/55ns (max.) -mercial: 37/45ns (max.)
- Low-power operation -IDT7174S Active: 300mW (typ.)
- Produced with advanced CEMOS'- high-performance technology
- Single 5V (±10%) power supply
- Input and output directly TTL-patible
- Three-state output
- Static operation: no clocks or refresh required
- Standard 28-pin DIP (600 mil), 28-pin THINDIP (400 mil)