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IDT72T51353 Datasheet

(IDT72T513x3) MULTI-QUEUE FLOW-CONTROL DEVICES

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ADVANCE INFORMATION
2.5V MULTI-QUEUE FLOW-CONTROL DEVICES
(8 QUEUES) 18 BIT WIDE CONFIGURATION
589,824 bits, 1,179,648 bits and 2,359,296 bits
IDT72T51333
IDT72T51343
IDT72T51353
FEATURES:
Choose from among the following memory density options:
IDT72T51333 Total Available Memory = 589,824 bits
IDT72T51343 Total Available Memory = 1,179,648 bits
IDT72T51353 Total Available Memory = 2,359,296 bits
Configurable from 1 to 8 Queues
Queues may be configured at master reset from the pool of
Total Available Memory in blocks of 512 x 18 or 1,024 x 9
Independent Read and Write access per queue
User programmable via serial port
User selectable I/O: 2.5V LVTTL, 1.5V HSTL, 1.8V eHSTL
Default multi-queue device configurations
-IDT72T51333: 4,096 x 18 x 8Q
-IDT72T51343: 8,192 x 18 x 8Q
-IDT72T51353: 16,384 x 18 x 8Q
100% Bus Utilization, Read and Write on every clock cycle
200 MHz High speed operation (5ns cycle time)
3.6ns access time
Echo Read Enable & Echo Read Clock Outputs
Individual, Active queue flags (OV, FF, PAE, PAF)
8 bit parallel flag status on both read and write ports
Provides continuous PAE and PAF status of up to 8 Queues
Global Bus Matching - (All Queues have same Input Bus Width
and Output Bus Width)
User Selectable Bus Matching Options:
- x18in to x18out
- x9in to x18out
- x18in to x9out
- x9in to x9out
FWFT mode of operation on read port
Partial Reset, clears data in single Queue
Expansion of up to 8 multi-queue devices in parallel is available
Power Down Input provides additional power savings in HSTL
and eHSTL modes.
JTAG Functionality (Boundary Scan)
Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm
HIGH Performance submicron CMOS technology
FUNCTIONAL BLOCK DIAGRAM
MULTI-QUEUE FLOW-CONTROL DEVICE
WADEN
FSTR
WRADD
6
WEN
WCLK
Din
x9, x18
DATA IN
FF
PAF
PAFn
8
Q0
Q7
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
RADEN
ESTR
RDADD
6 REN
RCLK
EREN
ERCLK
OE
Qout
x9, x18
DATA OUT
OV
PAE
PAEn
8
6113 drw01
NOVEMBER 2003
DSC-6113/2


Integrated Device Technology Electronic Components Datasheet

IDT72T51353 Datasheet

(IDT72T513x3) MULTI-QUEUE FLOW-CONTROL DEVICES

No Preview Available !

IDT72T51333/72T51343/72T51353 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES
(8 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
DESCRIPTION
The IDT72T51333/72T51343/72T51353 multi-queue flow-control de-
vices are single chip within which anywhere between 1 and 8 discrete FIFO
queues can be setup. All queues within the device have a common data input
bus, (write port) and a common data output bus, (read port). Data written into
the write port is directed to a respective queue via an internal de-multiplex
operation, addressed by the user. Data read from the read port is accessed
from a respective queue via an internal multiplex operation, addressed by
the user. Data writes and reads can be performed at high speeds up to
200MHz, with access times of 3.6ns. Data write and read operations are totally
independent of each other, a queue maybe selected on the write port and
a different queue on the read port or both ports may select the same queue
simultaneously.
The device provides Full flag and Output Valid flag status for the queue
selected for write and read operations respectively. Also a Programmable
Almost Full and Programmable Almost Empty flag for each queue is provided.
Two 8 bit programmable flag busses are available, providing status of all
queues, including queues not selected for write or read operations, these flag
busses provide an individual flag per queue.
Bus Matching is available on this device, either port can be 9 bits or 18 bits
wide. When Bus Matching is used the device ensures the logical transfer of
data throughput in a Little Endian manner.
The user has full flexibility configuring queues within the device, being able
to program the total number of queues between 1 and 8, the individual queue
depths being independent of each other. The programmable flag positions are
also user programmable. All programming is done via a dedicated serial port.
If the user does not wish to program the multi-queue device, a default option is
available that configures the device in a predetermined manner.
Both Master Reset and Partial Reset pins are provided on this device. A Master
Reset latches in all configuration setup pins and must be performed before
programming of the device can take place. A Partial Reset will reset the read and
write pointers of an individual queue, provided that the queue is selected on both
the write port and read port at the time of partial reset.
Echo Read Enable, EREN and Echo Read Clock, ERCLK outputs are
provided. These are outputs from the read port of the queue that are required
for high speed data communication, to provide tighter synchronization between
the data being transmitted from the Qn outputs and the data being received by
the input device. Data read from the read port is available on the output bus with
respect toERENandERCLK,thisisveryusefulwhendataisbeingreadathigh
speed.
The multi-queue flow-control device has the capability of operating its IO in
either 2.5V LVTTL, 1.5V HSTL or 1.8V eHSTL mode. The type of IO is selected
via the IOSEL input. The core supply voltage (VCC) to the multi-queue is always
2.5V, however the output levels can be set independently via a separate supply,
VDDQ.
The devices also provide additional power savings via a Power Down Input.
This input disables the write port data inputs when no write operations are
required.
A JTAG test port is provided, here the multi-queue flow-control device has a
fully functional Boundary Scan feature, compliant with IEEE 1149.1 Standard
Test Access Port and Boundary Scan Architecture.
See Figure 1, Multi-Queue Flow-Control Device Block Diagram for an outline
of the functional blocks within the device.
2


Part Number IDT72T51353
Description (IDT72T513x3) MULTI-QUEUE FLOW-CONTROL DEVICES
Maker IDT
Total Page 30 Pages
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