• High-density 64K1128K-bit CMOS dual-port RAM module
• 16K x 8 organization (IDT7M135) with 8K x 8
• Low-power consumption
• CEMOS·· process virtually eliminates alpha particle soft errors
rates (with no organic die coating)
• On-chip port arbitration logic
• BUSY flags
• Fully asynchronous operation from either port
• Single 5V (±10%) power supply
• Dual Vee and GND pins for maximum noise immunity
• On-chip pull up resistors for open-drain BUSY flag option
• Inputs and output directly TTL-compatible
• Fully static operation
• Modules available with semiconductor components 100%
screened to MIL-STD-883, Class B
• Finished modules tested at Room, Hot and Cold temperatures
for all AC and DC parameters as per customer requirement
1. Both Vee pins need to be connected to the 5V supply, and both GND pins need
to be grounded for proper operation.
2. On 8Kx8 IOT7M134 option, A'3l and A'3A need to be externally connected to
ground for proper operation.
CEMOS is a trademark of Integrated Device Technology, Inc.
The IDT7M134/135 are 64K1128K-bit high-speed CMOS dual-
port static RAM modules constructed on a multi-layered ceramic
substrate using four IDT7132 2K x 8 dual-port RAMs (IDT7M134)
or eight IDT7132 dual-port RAMs (IDT7M135) in leadless chip
carriers. Dual-port function is achieved by utilization of the two
on-board IDT54/74FCT138 decoder circuits that interpret the
higher order addresses AL11-13 and ARI'-13 to select one of the
eight 2K x 8 dual-port RAMs. (On IDT7M134 8K x 8 option, the
AL13 and AR13 need to be externally grounded and the selection
becomes one of the four 2K x 8 dual-port RAMs.) Extremely high
speeds are achieved in this fashion due to the use of the IDT7132
dual-port RAM, fabricated in IDT's high-performance CEMOS
The IDT7M134/IDT7M135 provide two ports with separate con-
trol, address and I/O pins that permit independent access for
reads or writes to any location in the memory. The BUSY flags
are provided for the situation when both ports simultaneously
access the same memory location. The on-Chip arbitration logic will
determine which port has access and sets the BUSY flag of the
delayed port. BUSY is set at speeds that permit the processor to
hold the operation and its respective address and data. The
delayed port will have access when BUSY goes high (inactive).
The IDT7M134/135 are available with access times as fast as
70ns commercial and 90ns military temperature range, with
operating power consumption of only 2.1 W/3.5W (max.). The module
also offers a standby power mode of 1.4W/2.8W (max.) and a full
standby mode of 660mW/1.3W (max.).
AIiIDT military module semiconductor components are 100%
processed to the test methods of MIL-STD-883, Class B, making
them ideally suited to applications demanding the highest level of
performance and reliabi lity.
LEFTPORT RIGHT PORT
1/0 0l-1/0 7l
BUSY FLAG (OPEN DRAIN)
PULL-UP RESISTORS for
Open-drain BUSY FLAG option
MILITARY AND COMMERCIAL TEMPERATURE RANGES
@ 1986 Integrated Device Technology, Inc.
Printed in U.S.A.