IS43TR85120EC Datasheet | ISSI

FEATURES - Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V - Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward patible to 1.5V - 8 internal banks for concurrent operation - 8n-Bit pre-fetch architecture - Programmable CAS Latency - Programmable Additive Latency: 0, CL-1,CL-2 - Programmable CAS WRITE latency (CWL) based on t CK - Programmable Burst Length: 4 and 8 - Programmable Burst Sequence: Sequential or Interleave - BL switch on the fly - Auto Self Refresh(ASR) - Self Refresh Temperature(SRT) - Refresh Interval: 7.8 µs (8192 cycles/64 ms) Tc= -40°C to 85°C 3.9 µs (8192 cycles/32 ms) Tc= 85°C to 95°C 1.95 µs (8192 cycles/16 ms) Tc= 95°C to 105°C 0.97 µs (8192 cycles/8 ms) Tc= 105°C to 115°C 0.488 µs (8192 cycles/4 ms) Tc= 115°C to 125°C - Partial Array Self Refresh - Asynchronous RESET pin JANUARY 2024 - TDQS (Termination Data Strobe) supported (x8 only) - OCD (Off-Chip Driver Impedance Adjustment) - Dynamic ODT (On-Die Termination) - Driver strength : RZQ/7, RZQ/6 (RZQ = 240 Ω) - Write Leveling - Up to 200 MHz in DLL off mode - Operating temperature: mercial (TC = 0°C to +95°C) Industrial (TC = -40°C to +95°C) Automotive, A1 (TC = -40°C to +95°C) Automotive, A2 (TC = -40°C to +105°C) Automotive, A25 (TC = -40°C to +115°C) Automotive, A3 (TC = -40°C to +125°C) ECC FEATURES - ECC Single bit error protection (per 4-bits) - 1-bit error correction, 2-bit error detection - 6 ECC registers to set ECC features , to store ECC event status - ECC registers can be accessed by Mode Register access or I2C interface by ordering option - ERR output signal OPTIONS - Configuration: 512Mx8, 256Mx16 - Green Package: 96-ball BGA (10mm x 14mm) for x16 78-ball BGA (10mm x 14mm) for x8 - Speed bin up to 1866 ADDRESS TABLE Parameter...