IS61NLP51232B sram equivalent, 18mb state bus synchronous sram.
* 100 percent bus utilization
* No wait cycles between Read and Write
* Internal self-timed write cycle
* Individual Byte Write Control
* Single R/W (.
They are organized as 512K words by 36 bits and 1024K words by 18 bits, fabricated with ISSI's advanced CMOS technology.
Image gallery
Download