IS61QDB21M18C Datasheet 18mb Quad Synchronous Sram

Manufacturer: ISSI (now Infineon)

Overview: IS61QDB21M18C IS61QDB251236C 1Mx18, 512Kx36 18Mb QUAD (Burst 2) Synchronous SRAM JANUARY.

Datasheet Details

The 18Mb IS61QDB251236C and IS61QDB21M18C are synchronous, high-performance CMOS static random access memory (SRAM) devices.

These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.

The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed.

512Kx36 and 1Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipeline read with EARLY write operation.
Double Data Rate (DDR) interface for read and write input ports.
Fixed 2-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and control registering at rising ed.

Part Number	Description
IS61QDB21M18A	18Mb QUAD (Burst 2) Synchronous SRAM
IS61QDB21M36	QUAD (Burst of 2) Synchronous SRAMs
IS61QDB21M36A	36Mb QUAD (Burst 2) Synchronous SRAM
IS61QDB21M36C	36Mb QUAD Synchronous SRAM
IS61QDB22M18	QUAD (Burst of 2) Synchronous SRAMs
IS61QDB22M18A	36Mb QUAD (Burst 2) Synchronous SRAM
IS61QDB22M18C	36Mb QUAD Synchronous SRAM
IS61QDB22M36	QUAD (Burst of 2) Synchronous SRAMs
IS61QDB22M36A	72Mb QUAD (Burst 2) Synchronous SRAM
IS61QDB24M18	QUAD (Burst of 2) Synchronous SRAMs