IS61QDP2B42M18A - 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM

The 36Mb IS61QDP2B41M36A/A1/A2 and IS61QDP2B42M18A/A1/A2 are synchronous, highperformance CMOS static random access memory (SRAM) devices.

These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.

• 1Mx36 and 2Mx18 configuration available.
• On-chip Delay-Locked Loop (DLL) for wide data valid window.
• Separate independent read and write ports with concurrent read and write operations.
• Synchronous pipeline read with late write operation.
• Double Data Rate (DDR) interface for read and write input ports.
• 2.0 cycle read latency.
• Fixed 4-bit burst for read and write operations.
• Clock stop support.
• Two input clocks (K and K#) for address and contr.