IS61WV102416FALL Datasheet | ISSI

FEATURES - High-speed access time: 8ns, 10ns, 20ns - High- performance, low power CMOS process - Multiple center power and ground pins for greater noise immunity - TTL patible inputs and outputs - Single power supply - 1.65V-2.2V VDD (IS61WV102416FALL) - 2.4V-3.6V VDD (IS61/64WV102416FBLL) - Packages available : - 48 ball mini BGA (6mm x 8mm) - 48 pin TSOP (Type I) - 54 pin TSOP (Type II) - Industrial and Automotive temperature support - Lead-free available - Data Control for upper and lower bytes DESCRIPTION FUNCTIONAL BLOCK DIAGRAM The ISSI IS61/64WV102416FALL/BLL are high-speed, 16M bit static RAMs organized as 1024K words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS# is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE#) controls both writing and reading of the memory. A data byte allows Upper Byte (UB#) and Lower Byte (LB#) access. The devices are packaged in the JEDEC standard 48-Pin TSOP (TYPE I), 48-pin mini BGA (6mm x 8mm), and 54-Pin TSOP (TYPE II) . A0 - A19 VDD GND I/O0 - I/O7 I/O8 - I/O15 DECODER I/O DATA CIRCUIT 1024K x 16 MEMORY ARRAY COLUMN I/O CS# or CS1#/CS2 OE# WE# UB# LB# CONTROL CIRCUIT Copyright © 2019 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution,...