IS62WV25616ECLL Datasheet | ISSI

IS62WV25616EALL/EBLL/ECLL IS65WV25616EBLL/ECLL 256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM NOVEMBER 2018 KEY Features - High-speed access time: 35ns, 45ns, 55ns - CMOS low power operation - Operating Current: 22 m A (max) at 85°C - CMOS Standby Current: 3.7u A (typ) at 25°C - TTL patible interface levels - Single power supply - 1.65V-2.2V VDD (IS62/65WV25616EALL) - 2.2V-3.6V VDD (IS62/65WV25616EBLL) - 3.3V +/-5% VDD (IS62/65WV25616ECLL) - Package : 44-pin TSOP (Type II) 48-pin mini BGA - mercial, Industrial and Automotive temperature support - Lead-free available DESCRIPTION The ISSI IS62/65WV25616EALL/EBLL/ECLL are high-speed, low power, 4M bit static RAMs organized as 256K words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS1# is HIGH (deselected) or when CS2 is LOW (deselected) or when CS1# is LOW, CS2 is HIGH and both LB# and UB# are HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE#) controls both writing and reading of the memory. A data byte allows Upper Byte (UB#) and Lower Byte (LB#) access. The IS62/65WV25616EALL/EBLL/ECLL are packaged in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and 44-Pin TSOP (TYPE II). FUNCTIONAL BLOCK DIAGRAM A0 - A17 DECODER 256K x 16 MEMORY ARRAY VDD GND I/O0 - I/O7 Lower...