* l Maximum lead temperature for soldering 1.6 mm (0.062 in.) from case for 10 s l l l International standard package JEDEC TO-247 AD Low RDS (on) HDMOSTM process Rugged polysilicon gate cell structure Fast switching times Symbol Test Conditions Characteristic Values (TJ = 25°C, unless otherwise
IXTH14N100 Datasheet (46.57 KB)
IXTH14N100
IXYS Corporation
46.57 KB
Megamostmfet.
IXTH 14N100 VDSS MegaMOSTMFET N-Channel Enhancement Mode ID25 RDS(on) = 1000 V = 14 A = 0.82 Ω Symbol VDSS VDGR VGS VGSM ID25 IDM PD TJ TJM T stg M.
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