Description
10 Physical Address Space Map11 Static Memory Interface 13 Register Description 14 Example of Connection 19 Basic Interface 21 Byte Control 25 Burst ROM Interface 28 Register Description 29 NAND Flash Boot Loader 36 NAND Flash Operation 37 Register Description 42 Refresh Time Constant Register (RTCOR) 49 Example of Connection 51 Address Multiplexing 53 SDRAM Command 56 SDRAM Timing 57 Power-Down Mode 71 Refreshing 72 Initialize Sequence 76
3.4.1 3.4.2 3.4.3 3.4.4 3.4.5 3.5 3.5.1 3.5.2
Features
- 3 CPU core 3 Multimedia support 3 Memory sub-system 3 Clock generation and power management 4 On-chip peripherals 4
1.2.1 1.2.2 1.2.3 1.2.4 1.2.5 1.3
Characteristic 6
2 CPU Core 7 3 External Memory Controller 9
3.1 3.2 3.3 3.4 Overview 9 Pin.