IC62C256 Datasheet | Integrated Circuit Solution

1+$ + #$ 32K x 8 LOW POWER CMOS STATIC RAM .EATURES • Access time: 45, 70 ns • Low active power: 200 m W (typical) • Low standby power — 250 µW (typical) CMOS standby — 28 m W (typical) TTL standby • .ully static operation: no clock or refresh required • TTL patible inputs and outputs • Single 5V power supply DESCRIPTION The 1+51 IC62C256 is a low power, 32,768 word by 8-bit CMOS static RAM. It is fabricated using 1+51's high- performance, low power CMOS technology. When CS is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) at CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Select (CS) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IC62C256 is pin patible with other 32K x 8 SRAMs in 330mil SOP or 8- 13.4mm TSOP-1 package. .UNCTIONAL BLOCK DIAGRAM A0-A14 VCC GND...