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ICS94235 - Programmable System Clock Chip

Datasheet Summary

Description

PIN NUMBER 1 PIN NAME RESET# TYPE OUT DESCRIPTION Real time system reset signal for frequency value or watchdog timmer timeout.

This signal is active low.

Asynchronous active low input pin used to power down the device into a low power state.

Features

  • 1 - Differential pair open drain CPU clocks.
  • 1 - Single-ended open drain CPU clock.
  • 13 - SDRAM @ 3.3V.
  • 7 - PCI @ 3.3V.
  • 2 - AGP @ 3.3V.
  • 1 - 48MHz, @3.3V.
  • 1 - REF @ 3.3V, (selectable strength) through I2C Features:.
  • Programmable ouput frequency.
  • Programmable ouput rise/fall time.
  • Programmable CPU, SDRAM, PCI and AGP skew.
  • Real time system reset output.
  • Spread spectrum for EMI control typic.

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Datasheet Details

Part number ICS94235
Manufacturer Integrated Circuit System
File Size 293.21 KB
Description Programmable System Clock Chip
Datasheet download datasheet ICS94235 Datasheet
Additional preview pages of the ICS94235 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS94235 Programmable System Clock Chip for AMD - K7™ processor Recommended Application: ALI 1647 style chipset Output Features: • 1 - Differential pair open drain CPU clocks • 1 - Single-ended open drain CPU clock • 13 - SDRAM @ 3.3V • 7 - PCI @ 3.3V • 2 - AGP @ 3.3V • 1 - 48MHz, @3.3V • 1 - REF @ 3.3V, (selectable strength) through I2C Features: • Programmable ouput frequency • Programmable ouput rise/fall time • Programmable CPU, SDRAM, PCI and AGP skew • Real time system reset output • Spread spectrum for EMI control typically by 7dB to 8dB, with programmable spread percentage • Watchdog timer technology to reset system if over-clocking causes malfunction • Uses external 14.
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