ICSSSTU32866 - 25-Bit Configurable Registered Buffer

Integrated Circuit System

Datasheet Details

Part number	ICSSSTU32866
Manufacturer	Integrated Circuit System
File Size	202.68 KB
Description	25-Bit Configurable Registered Buffer
Datasheet	ICSSSTU32866_IntegratedCircuitSystem.pdf

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation.

25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity check functionality.
Supports SSTL_18 JEDEC specification on data inputs and outputs.
Supports LVCMOS switching levels on CSR# and RESET# inputs.
Low voltage operation VDD = 1.7V to 1.9V.
Available in 96 BGA package Pin Configuration 1 A B C D E F G H J K L M N P 2 3 4 5 6 Functionality Truth Table I nputs RST# H H H H H H H H H H H H L DCS# L L L L L L H H H H H H X or Floating C.

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Published: Jun 20, 2010 |