ICS650-07C datasheet, source equivalent, Integrated Circuit Systems

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ICS650-07C Features and benefits

* Packaged in 20 pin narrow (150 mil) SSOP (QSOP)
* 12.5 MHz or 25.00 MHz fundamental crystal or clock input
* Six output clocks with selectable frequencies <.

ICS650-07C Application

Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25.00 MHz clock or fundamental mode c.

ICS650-07C Description

The ICS650-07C is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25.00 MHz clock or fundamental mode crystal input to produce m.

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