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ICS8624 Datasheet - Integrated Circuit Systems

1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER

ICS8624 Features

* Fully integrated PLL

* 5 differential HSTL outputs

* Selectable differential CLKx, nCLKx input pairs

* CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, HSTL, SSTL, HCSL

* Output frequency range: 31.25MHz to 700MHz

ICS8624 General Description

The ICS8624 is a high performance, 1-to-5 Differential-to-HSTL zero delay buffer and HiPerClockS™ a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8624 has two selectable clock input pairs. The CLK0, nCLK0 and CLK1, nCLK1 pair can accept most standard differen.

ICS8624 Datasheet (320.43 KB)

Preview of ICS8624 PDF

Datasheet Details

Part number:

ICS8624

Manufacturer:

Integrated Circuit Systems

File Size:

320.43 KB

Description:

1-to-5 differential-to-hstl zero delay buffer.

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ICS8624 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER Integrated Circuit Systems

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