Datasheet4U Logo Datasheet4U.com

ICS86953I-147 - 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER

General Description

The ICS86953I-147 is a low voltage, low skew 1-to-9 Differential-to-LVCMOS/LVTTL Clock HiPerClockS™ Generator and a member of the HiPerClock S ™ family of High Performance Clock Solutions from ICS.

The PCLK, nPCLK pair can accept most standard differential input levels.

Key Features

  • 9 single ended LVCMOS/LVTTL outputs; (8) clocks, (1) feedback.
  • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL.
  • Maximum output frequency: PLL Mode, 175MHz.
  • VCO range: 250MHz to 700MHz.
  • Output skew: 75ps (maximum).
  • Cycle-to-cycle jitter: 50ps (maximum).
  • Static phase offset: 90ps ± 110ps.
  • 3.3V supply voltage.

📥 Download Datasheet

Datasheet Details

Part number ICS86953I-147
Manufacturer Integrated Circuit Systems
File Size 291.86 KB
Description 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER
Datasheet download datasheet ICS86953I-147 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ICS810001-21 FEMTOCLOCKS-TM DUAL VCXO VIDEO PLL ICS
ICS81006 VCXO-TO-6 LVCMOS OUTPUTS ICS
ICS81006I VCXO-TO-LVCMOS OUTPUTS IDT
ICS81006I VCXO-TO-6 LVCMOS OUTPUTS ICS
ICS810251I VCXO and Synchronous Ethernet Jitter Attenuator Integrated Device Technology

Other Datasheets by Integrated Circuit Systems

Part Number Description
ICS8602 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS8624 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
ICS8633-01 1-TO-3 DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY BUFFER
ICS82C404 Dual Programmable Graphics Frequency Generator
ICS8302 LOW SKEW 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Integrated Circuit Systems, Inc. ICS86953I-147 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER FEATURES • 9 single ended LVCMOS/LVTTL outputs; (8) clocks, (1) feedback • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • Maximum output frequency: PLL Mode, 175MHz • VCO range: 250MHz to 700MHz • Output skew: 75ps (maximum) • Cycle-to-cycle jitter: 50ps (maximum) • Static phase offset: 90ps ± 110ps • 3.3V supply voltage GENERAL DESCRIPTION The ICS86953I-147 is a low voltage, low skew 1-to-9 Differential-to-LVCMOS/LVTTL Clock HiPerClockS™ Generator and a member of the HiPerClock S ™ family of High Performance Clock Solutions from ICS. The PCLK, nPCLK pair can accept most standard differential input levels.