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ICS86953I-147 Datasheet - Integrated Circuit Systems

1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER

ICS86953I-147 Features

* 9 single ended LVCMOS/LVTTL outputs; (8) clocks, (1) feedback

* PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL

* Maximum output frequency: PLL Mode, 175MHz

* VCO range: 250MHz to 700MHz

* Output skew: 75ps (maximum)

ICS86953I-147 General Description

The ICS86953I-147 is a low voltage, low skew 1-to-9 Differential-to-LVCMOS/LVTTL Clock HiPerClockS™ Generator and a member of the HiPerClock S ™ family of High Performance Clock Solutions from ICS. The PCLK, nPCLK pair can accept most standard differential input levels. With output frequencies up to.

ICS86953I-147 Datasheet (291.86 KB)

Preview of ICS86953I-147 PDF

Datasheet Details

Part number:

ICS86953I-147

Manufacturer:

Integrated Circuit Systems

File Size:

291.86 KB

Description:

1-to-9 differential-to-lvcmos / lvttl zero delay buffer.

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ICS86953I-147 1-TO-9 DIFFERENTIAL-TO-LVCMOS LVTTL ZERO DELAY BUFFER Integrated Circuit Systems

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