ICS9250-11 Datasheet | Integrated Circuit Systems

Description The ICS9250-11 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator (DRCG) chip such as the ICS9212-01, 02, 03 and a PCI buffer 9112-17. Spread Spectrum may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8d B to 10d B. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9250-11 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. The CPU/2 clocks are inputs to the DRCG. Features • Generates the following system clocks: - 6 - CPU Clocks 100/133MHz (2.5V). - 2 - CPU/2 output for synchronous memory reference (2.5V). - 4 - fixed frequency Clocks @ 66.6MHz (3.3V). - 2 - fixed frequency Clocks @ 33.3MHz (3.3V). - 6 - IOAPIC Clocks @ ¼ of CPUCLK or 16.667MHz, synchronous to CPU Clock (2.5V) - 1 - 48MHz Clock (3.3V) - 2 - REF Clocks @ 14.31818MHz 0.5% typical down spread modulation on CPU, PCI, IOAPIC, 3V66 and CPU/2 output clocks. Uses external 14.318MHz crystal. • • Block Diagram X1 X2 REF (0:1) Pin Configuration SPREAD# PLL Spread Spectrum CPUCLK (0:5) /2 /3 C o n t r o l /3 /2 /4 /2 /2 IOAPIC(0:5) SEL 133/100# SEL(0:1) CPU/2 (0:1) 3V66...