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Integrated Circuit Systems

ICS950403 Datasheet Preview

ICS950403 Datasheet

AMD - K8 System Clock Chip

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Integrated
Circuit
Systems, Inc.
ICS950403
Advance Information
AMD - K8™ System Clock Chip
Recommended Application:
AMD K8 System Clock with AMD, VIA or ALI Chipset
Pin Configuration
Output Features:
• 2 - Differential pair push-pull CPU clocks @
3.3V
• 9 - PCICLK (Including 1 free running) @ 3.3V
• 3 - Selectable PCICLK/HTTCLK @ 3.3V
• 1 - HTTCLK @ 3.3V
• 1 - 48MHz @ 3.3V fixed.
• 1 - 24/48MHz @ 3.3V
• 3 - REF @ 3.3V, 14.318MHz.
Features:
• Programmable output frequency.
• Programmable output divider ratios.
• Programmable output rise/fall time.
• Programmable output skew.
• Programmable spread percentage for EMI
control.
• Watchdog timer technology and RESET# output
to reset system
if system malfunctions.
• Programmable watch dog safe frequency.
• Support I2C Index read/write and block read/
write operations.
• Uses external 14.318MHz crystal.
• Supports Hyper Transport Technology (HTTCLK).
*FS0/REF0 1
48 REF1/FS1*
VDDREF 2
47 GND
X1 3
46 VDDREF
X2 4
45 REF2/FS2*
GND 5
44 Reset#
~*ModeA/HTTCLK0 6
43 VDDA
~*ModeB/PCICLK7/HTTCLK1 7
42 GND
~PCICLK8/HTTCLK2 8
41 CPUCLK8T0
VDDPCI 9
40 CPUCLK8C0
GND 10
39 GND
~PCICLK9/HTTCLK3 11
38 VDDCPU
PCICLK10 12
37 CPUCLK8T1
PCICLK0 13
36 CPUCLK8C1
PCICLK1 14
35 VDDCPU
GND 15
34 GND
VDDPCI 16
33 GND
~PCICLK2 17
32 PD#*
~PCICLK3 18
31 48MHz/FS3**
VDDPCI 19
30 GND
GND 20
29 AVDD48
PCICLK4 21
28 24_48MHz/Sel24_48#*~
PCICLK5 22
27 GND
~PCICLK_F 23
26 SDATA
~PCICLK6 24
25 SCLK
48-SSOP
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
~ This Output has 2X Drive Strength
Block Diagram
X1
X2
PD#
SDATA
SCLK
FS (3:0)
MODE (A,B)
SEL24_48#
PLL2
XTAL
OSC
PLL1
Spread
Spectrum
Control
Logic
Config.
Reg.
/2
CPU
DIVDER
PCI
DIVDER
Stop
X2
48MHz
24_48MHz
REF (2:0)
CPUCLKC (1:0)
CPUCLKT (1:0)
PCICLK (6:0, 10)
PCICLK_F
PCICLK/HTTCLK (3:1)
HTTCLK0
Functionality
FS3 FS2 FS1 FS0 CPU
MHz
HTT
MHz
0 0 0 0 100.90 67.27
0 0 0 1 133.90 66.95
0 0 1 0 168.00 67.20
0 0 1 1 202.00 67.33
0 1 0 0 100.20 66.80
0 1 0 1 133.50 66.75
0 1 1 0 166.70 66.68
0 1 1 1 200.40 66.80
1 0 0 0 150.00 60.00
1 0 0 1 180.00 60.00
1 0 1 0 210.00 70.00
1 0 1 1 240.00 60.00
1 1 0 0 270.00 67.50
1 1 0 1 233.33 66.67
1 1 1 0 266.67 66.67
1 1 1 1 300.00 75.00
PCI
MHz
33.63
33.48
33.60
33.67
33.40
33.38
33.34
33.40
30.00
30.00
35.00
30.00
33.75
33.33
33.33
37.50
0732—01/27/03
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.




Integrated Circuit Systems

ICS950403 Datasheet Preview

ICS950403 Datasheet

AMD - K8 System Clock Chip

No Preview Available !

ICS950403
Advance Information
Pin Descriptions
PIN #
PIN NAME
PIN
TYPE
DESCRIPTION
1 *FS0/REF0
I/O Frequency select latch input pin / 14.318 MHz reference clock.
2 VDDREF
3 X1
4 X2
PWR Ref, XTAL power supply, nominal 3.3V
IN Crystal input,nominally 14.318MHz.
OUT Crystal output, Nominally 14.318MHz
5 GND
6 ~*ModeA/HTTCLK0
PWR Ground pin.
I/O Mode selection latch input pin / Hyper Transport output.
7 ~*ModeB/PCICLK7/HTTCLK I/O Mode selection latch input pin / PCI clock output / Hyper Transport output.
8 ~PCICLK8/HTTCLK2
OUT PCI clock output / Hyper Transport output.
9 VDDPCI
PWR Power supply for PCI clocks, nominal 3.3V
10 GND
PWR Ground pin.
11 ~PCICLK9/HTTCLK3
12 PCICLK10
OUT PCI clock output / Hyper Transport output.
OUT PCI clock output.
13 PCICLK0
14 PCICLK1
15 GND
OUT PCI clock output.
OUT PCI clock output.
PWR Ground pin.
16 VDDPCI
17 ~PCICLK2
PWR Power supply for PCI clocks, nominal 3.3V
OUT PCI clock output.
18 ~PCICLK3
19 VDDPCI
OUT PCI clock output.
PWR Power supply for PCI clocks, nominal 3.3V
20 GND
21 PCICLK4
PWR Ground pin.
OUT PCI clock output.
22 PCICLK5
23 ~PCICLK_F
OUT PCI clock output.
I/O Free running PCI clock not affected by PCI_STOP#.
24 ~PCICLK6
25 SCLK
26 SDATA
OUT
IN
I/O
PCI clock output.
Clock pin of I2C circuitry 5V tolerant
Data pin for I2C circuitry 5V tolerant
27 GND
PWR Ground pin.
28 24_48MHz/Sel24_48#*~
I/O
24/48MHz clock output / Latched select input for 24/48MHz output. 0=48MHz, 1 =
24MHz.
29 AVDD48
30 GND
PWR Power for 24/48MHz outputs and fixed PLL core, nominal 3.3V
PWR Ground pin.
31 48MHz/FS3**
32 PD#*
I/O Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
Asynchronous active low input pin used to power down the device into a low power
IN state. The internal clocks are disabled and the VCO and the crystal are stopped. The
33 GND
latency of the power down will not be greater than 1.8ms.
PWR Ground pin.
34 GND
35 VDDCPU
PWR Ground pin.
PWR Supply for CPU clocks, 3.3V nominal
36 CPUCLK8C1
37 CPUCLK8T1
OUT "Complementary" clocks of differential 3.3V push-pull K8 pair.
OUT "True" clocks of differential 3.3V push-pull K8 pair.
38 VDDCPU
39 GND
PWR Supply for CPU clocks, 3.3V nominal
PWR Ground pin.
40 CPUCLK8C0
41 CPUCLK8T0
OUT "Complementary" clocks of differential 3.3V push-pull K8 pair.
OUT "True" clocks of differential 3.3V push-pull K8 pair.
42 GND
43 VDDA
44 Reset#
45 REF2/FS2*
PWR
PWR
OUT
I/O
Ground pin.
3.3V power for the PLL core.
Real time system reset signal for frequency gear ratio change or watchdog timer
timeout. This signal is active low.
14.318 MHz reference clock / Frequency select latch input pin.
46 VDDREF
47 GND
PWR Ref, XTAL power supply, nominal 3.3V
PWR Ground pin.
48 REF1/FS1*
I/O 14.318 MHz reference clock / Frequency select latch input pin.
* Internal Pull-Up Resistor ** Internal Pull-Down Resistor ~ This Output has 2X Drive Strength
0732—01/27/03
2


Part Number ICS950403
Description AMD - K8 System Clock Chip
Maker Integrated Circuit Systems
Total Page 18 Pages
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