programmable timing control hub for p4 processor.
* 2 - Pairs of differential CPUCLKs (differential current mode)
* 1 - SDRAM @ 3.3V
* 8 - PCI @3.3V
* 2 - AGP @ 3.3V
* 2 - ZCLKs @ 3.3V
* 1- 48MHz.
it provides all the necessary clocks signals for such a system. The ICS952004 is part of a whole new line of ICS clock g.
The ICS952004 is a two chip clock solution for desktop designs using SIS 645/650 style chipsets. When used with a zero delay buffer such as the ICS9179-06 for PC133 or the ICS93705 for DDR applications it provides all the necessary clocks signals for.
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