ICS95V857-xxx Overview
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ICS95V857-xxx Key Features
- Low skew, low jitter PLL clock driver
- 1 to 10 differential clock distribution (SSTL_2)
- Feedback pins for input to output synchronization
- PD# for power management
- Spread Spectrum-tolerant inputs
- Auto PD when input signal removed
- Choice of static phase offset available, for easy board tuning; -XXX = device pattern number for options listed below
- ICS95V857
- ICS95V857-130 .. +50ps Specifications
- Meets PC3200 Class A+ specification for DDR-I 400 support
