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PA7128 Datasheet Programmable Electrically Erasable Logic Array

Manufacturer: Integrated Circuit Technology

Overview: mercial/ Industrial PA7128 PA7128 PEELTM Array Programmable Electrically Erasable Logic.

Datasheet Details

Part number PA7128
Manufacturer Integrated Circuit Technology
File Size 257.05 KB
Description Programmable Electrically Erasable Logic Array
Datasheet PA7128_IntegratedCircuitTechnology.pdf

General Description

The PA7128 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology.

PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’s programmable logic designs.

The PA7128 offers a versatile logic array architecture with 12 I/O pins, 14 input pins and 36 registers/latches (12 buried logic cells, 12 input registers/latches, 12 buried I/O registers/latches).

Key Features

  • s CMOS Electrically Erasable Technology.
  • Reprogrammable in 28-pin DIP , SOIC and PLCC packages Versatile Logic Array Architecture.
  • 12 I/Os, 14 inputs, 36 registers/latches.
  • Up to 36 logic cell output functions.
  • PLA structure with true product-term sharing.
  • Logic functions and registers can be I/O-buried Flexible Logic Cell.
  • Up to 3 output functions per logic cell.
  • D,T and JK registers with special features.
  • Independent or g.

More Datasheets from Integrated Circuit Technology

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