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Integrated Device Technology Electronic Components Datasheet

IDT54FCT825A Datasheet

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

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®
Integrated Device Technology, Inc.
HIGH-PERFORMANCE
CMOS BUS INTERFACE
REGISTERS
IDT54/74FCT821A/B/C
IDT54/74FCT823A/B/C
IDT54/74FCT824A/B/C
IDT54/74FCT825A/B/C
FEATURES:
• Equivalent to AMD’s Am29821-25 bipolar registers in
pinout/function, speed and output drive over full tem-
perature and voltage supply extremes
• IDT54/74FCT821A/823A/824A/825A equivalent to
FASTspeed
• IDT54/74FCT821B/823B/824B/825B 25% faster than
FAST
• IDT54/74FCT821C/823C/824C/825C 40% faster than
FAST
• Buffered common Clock Enable (EN) and asynchronous
Clear input (CLR)
• IOL = 48mA (commercial) and 32mA (military)
• Clamp diodes on all inputs for ringing suppression
• CMOS power levels (1mW typ. static)
• TTL input and output compatibility
• CMOS output level compatible
• Substantially lower input current levels than AMD’s
bipolar Am29800 series (5µA max.)
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT800 series is built using an advanced
dual metal CMOS technology.
The IDT54/74FCT820 series bus interface registers are
designed to eliminate the extra packages required to buffer
existing registers and provide extra data width for wider
address/data paths or buses carrying parity. The IDT54/
74FCT821 are buffered, 10-bit wide versions of the popular
‘374 function. The IDT54/74FCT823 and IDT54/74FCT824
are 9-bit wide buffered registers with Clock Enable (EN) and
Clear (CLR) – ideal for parity bus interfacing in high-perform-
ance microprogrammed systems. The IDT54/74FCT825 are
8-bit buffered registers with all the ‘823 controls plus multiple
enables (OE1, OE2, OE3) to allow multiuser control of the
interface, e.g., CS, DMA and RD/WR. They are ideal for use
as an output port requiring HIGH IOL/IOH.
All of the IDT54/74FCT800 high-performance interface
family are designed for high-capacitance load drive capability,
while providing low-capacitance bus loading at both inputs
and outputs. All inputs have clamp diodes and all outputs are
designed for low-capacitance bus loading in high-impedance
state.
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT821/823/825
D0 DN
EN
IDT54/74FCT824
D0
EN
DN
CLR
CP
D CL Q
CP Q
D CL Q
CP Q
CLR
CP
OE
Y0
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
YN
2608 cnv* 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992 Integrated Device Technology, Inc.
7.19
OE
D CL Q
CP Q
D CL Q
CP Q
Y0 YN
2608 cnv* 02
MAY 1992
DSC-4618/2
1


Integrated Device Technology Electronic Components Datasheet

IDT54FCT825A Datasheet

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

No Preview Available !

IDT54/74FCT821/823/824/825A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS
PIN CONFIGURATIONS
IDT54/74FCT821 10-BIT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
LOGIC SYMBOLS
OE 1
24 VCC INDEX
D0 2
23 Y0
D1
D2
D3
D4
D5
D6
D7
D8
D9
GND
3 22
4 P24-1 21
5 D24-1 20
6 E24-1 19
7 & 18
8 SO24-2 17
9 16
10 15
11 14
12 13
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
CP
D2
4
5
3
2
1
28 27 26
25
Y2
10
D
D
D3 6
D4 7
24 Y3
23 Y4
Q
CP
NC 8
L28-1
22 NC CP
D5 9
D6 10
21 Y5
20 Y6
OE
D7 11
19 Y7
1213 14 15 16 17 18
10
Y
DIP/SOIC/CERPACK
TOP VIEW
IDT54/74FCT823/824 9-BIT REGISTERS
LCC
TOP VIEW
OE 1
24 VCC INDEX
D0 2
23 Y0
D1
D2
D3
D4
D5
D6
D7
D8
CLR
GND
3 22
4 P24-1 21
5 D24-1 20
6 SO24-2 19
7 & 18
8 E24-1 17
9 16
10 15
11 14
12 13
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
EN
CP
D2
4
5
3
2
1
28 27 26
25
D3 6
24
D4 7
23
NC 8
D5 9
L28-1
22
21
D6 10
20
D7 11
19
1213 14 15 16 17 18
9
Y2 D
Y3
Y4
NC CP
Y5 EN
Y6 CLR
Y7 OE
D
Q
CP EN CLR
2608 cnv* 03
9
Y
DIP/SOIC/CERPACK
TOP VIEW
IDT54/74FCT825 8-BIT REGISTER
LCC
TOP VIEW
OE1
OE2
D0
D1
D2
D3
D4
D5
D6
D7
CLR
GND
1 24 VCC INDEX
2 23 OE3
3 22
4 P24-1 21
5 D24-1 20
6 E24-1 19
7 & 18
8 SO24-2 17
9 16
Y0
Y1
Y2
Y3
Y4
Y5
Y6
D1
4
5
3
2
1
28 27 26
25
D2 6
24
D3 7
23
NC 8
D4 9
L28-1
22
21
D5 10
20
10 15 Y7
11 14 EN
D6 11
19
1213 14 1516 17 18
12 13 CP
8
D
Y1
Y2 CP
Y3 EN
NC CLR
Y4 OE1
Y5
Y6 OE2
OE3
D
Q
CP EN CLR
2608 cnv* 04
8
Y
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
2608 cnv* 05
7.19 2


Part Number IDT54FCT825A
Description HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS
Maker Integrated Device
Total Page 8 Pages
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